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Tuesday, April 1, 2025

Entry 20: 4-bit 2-to-1 multiplexer

In the previous entry, we designed this:

Adding DIP switches

Now, I also want to be able hook up 4 DIP switches to MAR and 4 DIP switches to MDR so that I can program the memory. Lets begin with DIP's for the address. 

So, lets ask Grok. "I have a four lines from MAR Q to RAM A. But I also want to hook up 4 DIP switches to RAM A. Is there a chip that will take two sets of inputs, each with four lines, and output one set of four lines? It should have pin where I can select if the input should be from MAR or from the DIP switches."

Yes, you can absolutely connect both your MAR (Memory Address Register) and the 4 DIP switches to the RAM and select between them using a single chip! What you’re looking for is a 4-bit 2-to-1 multiplexer (often called a 2:1 MUX). This chip takes two sets of 4-bit inputs and outputs one set of 4 bits, based on a select pin that chooses between the two sources—in your case, the MAR or the DIP switches. There’s a perfect IC for this: the 74LS157 (Quad 2-to-1 Multiplexer), which handles exactly 4 bits with a single select line.  It works perfectly with your setup (16x4 SRAM, 4-bit address/data buses). Let’s dive into how to use it for your setup.

Why a Multiplexer?

  • Problem: You want RAM’s A0–A3 inputs to come from either the MAR's Q0-Q3 or 4 DIP switches, but not both at once.
  • Solution: A 2-to-1 multiplexer acts like a switch, choosing one of two 4-bit inputs to pass to its output, controlled by a select pin. The output then feeds RAM’s A0–A3.

Why This Works

  • Setup: MAR latches the address bus directly, and the multiplexer selects between MAR Q0–Q3 and DIP switches to drive RAM A0–A3. This lets you:
    • Use MAR to hold an address from the bus, then decide if RAM uses that or a manual DIP switch value.
    • Bypass MAR entirely with DIP switches when needed.

Multiplexor

"How can I build a 2-to-1 multiplexer using basic gates?"

Building a 2-to-1 multiplexer (MUX) using basic gates is a great way to understand its inner workings. A 2-to-1 MUX selects between two inputs (A and B) and outputs one based on a select signal (S), which is exactly what you need to switch between the MAR’s Q0–Q3 and your DIP switches to drive the RAM’s address pins. For your 4-bit system, you’ll need four 1-bit 2-to-1 MUXes, but let’s start by designing a single 1-bit version using basic gates (AND, OR, NOT), then scale it to 4 bits. Here’s how to do it.


2-to-1 Multiplexer Basics

  • Inputs:
    • A: First input (e.g., MAR Q0).
    • B: Second input (e.g., DIP switch).
    • S: Select line (0 = A, 1 = B).
  • Output: Y (either A or B, based on S).
  • Logic:
    • If S = 0, Y = A.
    • If S = 1, Y = B.


Building a 1-Bit 2-to-1 MUX with Gates

You can construct this using:

  • 2 AND gates (e.g., 74LS08).
  • 1 OR gate (e.g., 74LS32).
  • 1 NOT gate (inverter, e.g., 74LS04).

Step-by-Step Design (replaced with picture)


Scaling to 4 Bits

Since your MAR and RAM use 4-bit addresses (A0–A3), you’ll need four 1-bit MUXes, one for each bit (A0, A1, A2, A3). All four share the same select signal (S), so you only need one NOT gate for S̅.

ACEL

I designed a 1 bit 2-to-1 MUX according to the design above. It is called TwoToOneMux.

  • The input pins are called A,B
  • The select pin is called S
  • The output pin is called Y

I also designed a quad 1 bit 2-to-1 MUX (like the 74LS157). It is called QuadTwoToOneMux.

  • The input pins are called A[4], B[4]
  • The select pin is called S (common to all)
  • The output pins is called Y[4]

The final setup with RAM, MAR, MDR, address bus, data bus, 2 MUX, DIP's for address and data, and control buttons is next, .. in entry 21.

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