Entry 21: RAM, MAR and MDR together

RAM, MAR and MDR together

Now that we have the multiplexers, we can add DIP switches to the memory system of entry 19:

• Data (D) on RAM comes either from the Memory Data Register (MDR) or from DIP switches. The left MUX determines which one. If S = 0, then from the MDR, and if S = 1, then from the DIPs.
• Address (A) on RAM comes either from the Memory Address Register (MAR) or from DIP switches. The right MUX determines which one. 

Testing the memory system

To test this out, I build the memory system above

• I also add a register to the data bus with REG-L and REG-W controlling when it loads and writes.
• In this test, I do not use the MAR at all and its Load and Write are not connected. Address will always come from the DIP's.
• MDR will not write to the data bus and it is not connected.  

Here is the physical setup:

• DIP 1 on both DIP blocks are connected to the select pin of respective MUX, where ON means "use DIP's" (OFF means "use MAR / MDR). 
• DIP 5-8 on both blocks are connected to MUX B. 
• Clock button is connecter to CLK on MDR, MAR and Register.
• MDR-L to Load pin of MDR
• RAM-L to Load pin of RAM
• RAM-W to Write pin of RAM
• REG-L to Load pin of register
• REG-W to Write pin of register

You can try this out yourself on Wokwi, "RAM MAR MDR":

Here are some tasks to perform to understand the memory setup. You will program the memory and then move data between RAM and the register:

  Demonstration of RAM, Memory Address Register (MAR)and Memory Data Register (MDR)

    Set DIP 1 to ON on the address DIP's (left)

    Set DIP 1 to ON on the data DIP's (right)

    This takes us into "programming mode" where the DIPs determine address and data

    Set an address on DIP 5-8 on the address DIP's and data on DIP 5-8 on the data DIP's

    Click Print

    Observe:

      The address mux and the data mux has selection S = 1 (DIPS) and they output address and data from DIPs

      Address A and Data D on RAM are given by the DIPS.

    Program some data, say 5 at address 0, 9 at address 1 and 6 at address 2:

      Set address DIPs to 0000

      Set data DIPS to 0101 (decimal 5)

      Click RAM-L

      Similarly for address 1 and 2

    Click Print. Observe RAM and that correct data has been programmed.

    Move the content of RAM at address 0 to the register

      Set address DIPs to 0000

      Click and hold RAM-W, REG-L (press 4 and 5 on keyboard)

      Click Clock to latch. Register now contains 5.

    Click Print. Observe Register and MDR and that Q = 5

    Program RAM address 3 with content of Register

      Set the Data select S to OFF (DIP 1). RAM D now takes input from MDR

      Click and hold REG-W, MDR-L (press 2 and 6 on keyboard)

      Click Clock to latch

      Set address DIPs to 0011

      Click RAM-L

    Click Print to check that RAM address 3 now contains 5