Instructions
Your setup is incredibly impressive—a fully functional 4-bit... (describing what we have so far). Adding instructions, an instruction register (IR), and an instruction decoder is the next logical step to turn your system into a basic processor capable of executing a program. Let’s dive into what these components are, how they work, and how you can integrate them into your setup to start running simple instructions.
What Are Instructions?
- Definition: Instructions are the basic commands a processor executes, encoded as binary patterns stored in memory (your RAM). Each instruction tells the system what to do, like load data, add numbers, or jump to a new address.
- In Your System: Instructions are 4-bit values (since your data bus is 4 bits), stored in the 16x4 RAM, addressed by the 4-bit PC (0000 to 1111).
- Purpose: Define a program—e.g., load Register A, add to B, store result—executed sequentially or with jumps.
- Example Instructions (4-bit):
- 0001: Load A from RAM.
- 0010: Add A and B, store in A.
- 0011: Store A to RAM.
Instruction Format
- 4 Bits: Limited to 16 unique instructions (0000 to 1111).
- Encoding: Each 4-bit code maps to an operation (opcode). Some instructions might include a 4-bit address (requiring a second fetch).
- Simple Set (Proposed):
- 0000: NOP (no operation).
- 0001: LDA addr (load A from RAM[addr]).
- 0010: ADD (A = A + B).
- 0011: STA addr (store A to RAM[addr]).
- 0100: JMP addr (set PC to addr).
- 0101: HLT (halts the program)
- 0110: MOV B, A (move A to B)
- 0111: MOV OUT, A (move A to OUT)
- More later as needed.
Example Program
Store in RAM:
- 0000: 0001 (LDA 1000)
- 0001: 1000 (address 1000)
- 0010: 0110 (MOV B, A)
- 0011: 0001 (LDA 1001)
- 0100: 1001 (address 1001)
- 0101: 0010 (ADD)
- 0110: 0111 (MOV B, OUT)
- 0111: 0101 (HLT)
- 1000: 0101 (data: 5)
- 1001: 0011 (data: 3)
My summary
- An instruction tells the processor what to do. For example, "LDA 6" means "Load the register A with whatever number is found at address 6" and "ADD" means "Add the numbers in register A and B and put the sum in register A".
- It is up to us to define which instructions the processor must understand, but the processor’s hardware (decoder, ALU, etc.) must support these instructions.
- Some instructions "stand by themselves" (they are "single-word instructions"). These are "NOP", "ADD", "HLT", MOV B, A, and MOV OUT, A.
- Some instructions have an "operand". For example, "LDA" by itself would be pointless. Therefore, it has an operand, which is a four bit address from which to get the number to put in A. STA and JMP also have an address as an operand.
- NOP, ADD, HLT, LDA, STA, JMP, MOV B, A, and MOV OUT, A are called opcodes. Each opcode is represented by a four bit binary number. NOP by 0000, LDA by 0001, ADD by 0010, and so on.
- Instructions that stand by themselves occupy one address in RAM. The data at this address is simply the four bit binary representation of the opcode.
- Instructions with an operand occupy two addresses in RAM. The first one is the opcode and the second one is the address.
- This means that a number stored in RAM at a given address can mean many things. It can be an opcode, it can be an operand (address), and it can be data.
I did confirm this summary with Grok and the summary includes comments made by Grok. Here is a summary of the eight instructions that Grok suggests we start with:
Let's have a closer look at the example program, repeated here with some more details:
This program will add 5 and 3 and display the result, in binary, using 4 LEDs. When we start the "computer", PC is zero and the processor will execute the first instruction, "LDA 8", loading register A with the number 5. It will then move on to the next instruction, "MOV B,A". It keeps on going until it gets to address 7 and "HLT". Note that addresses 0 to 7 is used for code while addresses 8 and 9 is used for data.
All of this is so far "in theory". What we have so far cannot decode instruction. Let's move on to the instruction register.
Instruction register
What Is an Instruction Register (IR)?
- Definition: The IR is a register that temporarily holds the current instruction (opcode) fetched from RAM during execution.
- Purpose:
- Stores the 4-bit instruction after it’s read from RAM (via the data bus).
- Feeds the instruction decoder to generate control signals.
- In Your System: A 4-bit register to hold the opcode, clocked when fetching from RAM.
How It Works
- PC outputs address (e.g., 0001) to RAM via address bus.
- RAM outputs instruction (e.g., 0010 = ADD) to data bus.
- IR clocks, latching 0010 from data bus.
- IR Q0–Q3 stay stable, driving the decoder.
What Is an Instruction Decoder?
-end-
Adding an instruction register
Let's add an instruction register (IR). This is "just a regular register", see entry 15. But it has a special purpose: it will hold the next opcode. This setup is sufficient to experiment with IR:
We enter the program using the DIPs:
- Addr: Data
- 0000: 0001
- 0001: 1000
- 0010: 0110
- 0011: 0001
- 0100: 1001
- 0101: 0010
- 0110: 0111
- 0111: 0101
- 1000: 0101
- 1001: 0011
Set AS and DS to ON to enter programming mode. Set address = 0000 and data = 0001 and click on "Load RAM", move on to address 1, and so on, until the program / data has been stored in RAM. Now, there is a way of cheating if we use ACEL. We can define
byte data[16] = {1,8,6,1,9,2,7,5,5,3,0,0,0,0,0,0};
and then we initialize the memory system with this data:
auto* memorySys = new SixteenByFourMemorySystem(data);
But this is indeed cheating. If we were using real ICs, this would not be possible. We would have to program using the DIPs.
Try this out at Wokwi, project "Instruction Register":
This project is very similar to "Program counter and memory system", see entry 17. The only difference is that the OUT register is replaced by an instruction register. Try the following steps:
The next step is to "decode" the instructions. This process is related to concept "T-state"... in the next entry.
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